\section{Introduction}
Batteryless systems are emerging as a promising future platform of Internet-of-Things (IoT) devices.
These systems adopt a small capacitor as an energy storage and operate by harvesting power from environmental sources.
This setup effectively addresses challenges associated with traditional battery-based systems, such as need for human intervention for recharging or replacement~\cite{choiCompilerDirected2022} and harmful environmental impacts~\cite{ahmedInternet2024}.
They are also known as intermittent systems, since the computation happens intermittently during short periods only when there exist sufficient power to compute.

Intermittent systems require software supports to sustain long-running executions across power failures.
% An intermittent system requires software support to retain volatile system state information across power interruptions. 
During operation, volatile data (e.g., registers or SRAM data) must be saved to Non-Volatile Memory (NVM) through a process called checkpointing.
When power is restored, this saved state is recovered to allow operations to resume the execution from the last checkpoint (recovery). 
In designing these state retention techniques, software designers rely on an \emph{execution model} that abstracts hardware-level operations and represents behavior of intermittent systems necessary for software design.

Fig.~\ref{fig:introduction} illustrates such execution model commonly adopted in the literature~\cite{ransfordMementos2011,jayakumarQUICKRECALL2014,maengAdaptive2020,dewinkelIntermittentlypowered2022,houTale2024,erataETAP2023,ghasemiPES2023,sanmiguelEH2018a}. 
As energy accumulates, the voltage of the capacitor gradually increases.
Once the voltage reaches the power-on threshold $V_h$, the collected power is supplied to the system. 
The system begins operation at this point, and execution is halted when the capacitor voltage reaches the power-off threshold $V_l$. 
Software designers aim to leverage this execution model to implement intermittent systems at minimal cost (e.g., by executing checkpoints just before reaching the power-off threshold~\cite{jayakumarQUICKRECALL2014,maengSupporting2019,maengAdaptive2020,kortbeekBFree2020,netoDiCA2023}).

\begin{figure}[t]
    \centering
    \includegraphics[width=\linewidth]{figs/cropped/intermittent_computing.pdf}
    \caption{Traditional execution model of intermittent systems.}
    \label{fig:introduction}
\end{figure}


In the meantime, recent research on intermittent systems is increasingly exploring shorter operation times by using smaller capacitors.
% In the meantime, researches on intermittent systems are increasingly exploring shorter operation times by using smaller capacitors (e.g., less than 1mF~\cite{ahmedEfficient2019}).
Operating on small capacitors is generally desirable, as it reduces device volume and enhances the responsiveness by enabling the system to wake up more frequently~\cite{bakarProtean2023a,maengAdaptive2020,alsubhiStash2024}.
As a result, recent studies have targeted operation times in the range of tens of milliseconds~\cite{reymondSCHEMATIC2024,wuIntOS2024,yildizEfficient2023,choiCompilerDirected2022,netoDiCA2023,kortbeekWARio2022,kortbeekTimesensitive2020} or even microseconds~\cite{reymondSCHEMATIC2024,wuIntOS2024}.
% However, as energy storage size decreases, the traditional execution model no longer provides an accurate abstraction of actual execution behavior.
However, as energy storage sizes decrease, the traditional execution model is failing to provide an accurate abstraction of actual execution behavior.
% The challenge is that the traditional execution model does not provide precise abstraction of the real execution anymore when the energy storage is very small.
The major source of this discrepancy is the buffering effects of the system's inherent capacitance, mostly coming from its decoupling capacitors.
This factor has been overlooked in the traditional model, as the inherent capacitance was considered negligible compared to the main energy storage.

Decoupling capacitors are on-board capacitors that act as energy buffers.
They are mandatory since the buffered energy prevent transient voltage drop when the system suddenly draws a large current, such as during checkpointing (Sec.~\ref{sec:system_description}).
However, their buffering effects also introduce discrepancies between the execution model and actual behavior.
For example, during power-on, they rapidly charge from the energy storage, making capacitor voltage an unreliable estimate of available energy.
This buffered energy also allows the system operate for a while at sub-normal voltages after the power supply is stopped.
Additionally, between power cycles, decoupling capacitors discharge due to the resistance of the system, considerably lowering the power efficiency.
In systems with smaller capacitors, these effects dominate the behaviors that are modeled in the traditional execution model.
Consequently, highly efficient checkpoint techniques according to the traditional model may introduce substantial power overhead and even correctness issues in small-scale systems.
% Consequently, designing software techniques based on the traditional model brings significant power overhead and even correctness issues, even they are extremely efficient in the traditional model.
% While this seems merely delaying the start and the end of the operations at first glance, we will show that it significantly affects the power efficiency and even correctness of software designs.

% This execution model has served as the foundation for many successful intermittent system technologies. 
% However, it may introduce considerable inaccuracies when applied to recent research aimed at very short power supply durations. 
% Short power interruptions generally improve system responsiveness and are therefore considered a desirable trait. 
% Recent studies have explored technologies operating with power supply times in the range of tens of milliseconds or microseconds, often utilizing small capacitors of less than 1mF for energy storage. 
% When capacitors of this scale are used, the system operates in a way that significantly diverges from the traditional model. 
% The primary reason is the presence of a decoupling capacitor on the board—an essential component that maintains system voltage during sudden current changes.

% The decoupling capacitor acts as an energy buffer, creating a deviation from the ideal execution model. 
% When power is supplied to the system, the decoupling capacitor rapidly charges and reduces capacitor voltage. 
% Then the buffered energy continues to power the system even after the power-off threshold is reached. 
% Understanding this effect is crucial for intermittent system designers, as it has a significant impact on both system efficiency and correctness.

In this paper, we propose a new execution model for intermittent systems which accounts for the buffering effects of decoupling capacitors.
In Sec.~\ref{sec:detailed_execution_model}, we demonstrate that understanding this model is critical for software designers:
intermittent systems designed upon the traditional model can be up to 5.62x more energy-inefficient than expected and may fail to predict power-off timings accurately, leading to unsafe checkpointing. 
In Sec.~\ref{sec:design_guidelines}, we present design guidelines to implement efficient intermittent systems with small energy storages, leveraging insights from our model.
Our guidelines include designs which improve end-to-end execution latencies by 3.04x in static and 2.86x in dynamic checkpointing schemes on average, without incurring additional overhead.
% Our guidelines include accurate power failure prediction methods that improve end-to-end execution latencies by 3.04x in static and 2.86x in dynamic checkpointing schemes on average, without incurring additional overhead.
% Our power failure prediction methods improve end-to-end execution latencies by 3.04x in static and 2.86x in dynamic checkpointing schemes on average, without incurring additional overhead.