Update on local

sections/Notes.tex

@@ -1,18 +1,10 @@
 \section{Notes}
 
-Execution duration. 
-around 10 ms~\cite{reymondSCHEMATIC2024,wuIntOS2024,yildizEfficient2023}.
-Several hundreds microseconds~\cite{reymondSCHEMATIC2024}.
-Nanoseconds~\cite{wuIntOS2024}.
-
-Using traditional model~\cite{shuklaEnergy2024a}.
+Using traditional model~\cite{shuklaEnergy2024a,reymondEarlyBird2024}.
 
 Estimating the remaining energy using the energy storage voltage.
-In modeling~\cite{houTale2024,kimRapid2024}.
 Use energy storage voltage for checkpoint signal~\cite{zengReplayCache2021,balsamoHibernus2015,balsamoHibernus2016,bhattiHarvOS2017,jayakumarQUICKRECALL2014,maengSupporting2019,maengAdaptive2020}.
 
 Power failure injection (soft reset)~\cite{wuIntOS2024,yildizEfficient2023}.
 
-Interrupt using Vdd~\cite{balsamoHibernus2016}.
-
-WCET-based approaches can be extremely pessimistic~\cite{raffeckWoCA2024}.
+Interrupt using Vdd~\cite{balsamoHibernus2016}.

sections/OurApproach.tex

@@ -3,6 +3,10 @@
 
 \subsection{Delay Checkpoint Execution}
 
+The overhead of early checkpointing is considered small~\cite{choiCompilerDirected2022}.
+For example, some static checkpointing~\cite{bhattiHarvOS2017} and WCET-based approaches~\cite{choiCompilerDirected2022,reymondSCHEMATIC2024} have explored strategy that 
+WCET-based approaches can be extremely pessimistic~\cite{raffeckWoCA2024}.
+
 \begin{figure}
     \centering
     \includegraphics[width=\linewidth]{figs/plot_expr_7_cropped.pdf}

sections/RelatedWork.tex

@@ -5,7 +5,11 @@ Techniques to find the best hardware configurations (model approaches~\cite{kimR
 Tradeoff of capacitor size and forward progress~\cite{zhanExploring2022}.
 These works do not consider discharge of decoupling capacitor.
 
+In the works not having dedicated power management system~\cite{balsamoHibernus2015,balsamoHibernus2016,netoDiCA2023,raffeckCO2CoDe2024,reymondEarlyBird2024}, 
+
 Considering sub-normal voltage execution~\cite{zhanExploring2022}.
-In transient computing~\cite{balsamoHibernus2015,balsamoHibernus2016,netoDiCA2023,raffeckCO2CoDe2024,reymondEarlyBird2024} (works do not using separate power management system) or hardware-based approaches.
+In transient computing~\cite{balsamoHibernus2015,balsamoHibernus2016,netoDiCA2023,raffeckCO2CoDe2024} (works do not using separate power management system) or hardware-based approaches.
 This work shows that considering sub-normal voltage execution is also important for designs using separate energy management system.
-They do not address the impact of sub-normal voltage execution to correctness and efficiency of software designs.
+They do not address the impact of sub-normal voltage execution to correctness and efficiency of software designs.
+
+Checkpoint techniques using capacitor voltage as an estimate of available energy.