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@@ -1,6 +1,8 @@
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\section{Introduction}
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-Batteryless systems.
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-Intermittent system consists of hardware and software.
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+Batteryless systems are increasingly recognized as a promising future platform of Internet-of-Things (IoT) devices.
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+They adopt a small capacitor as an energy storage and operate on power collected from environmental sources.
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+This setup efficiently avoids the challenges associated with battery such as human management for recharging/replacing and harmful environmental impacts.
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+These systems are also known as intermittent systems, since the computation happens intermittently when there exist sufficient power to compute.
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\begin{figure}
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\centering
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@@ -9,15 +11,24 @@ Intermittent system consists of hardware and software.
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\label{fig:introduction}
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\end{figure}
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-
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Intermittent systems require software support to maintain volatile system states across power failures.
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-Software designers rely on an \emph{execution model}, which abstracts the operations in the hardware and describes how intermittent system works.
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-Fig.~\ref{fig:introduction} shows this model.
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+The volatile system states (e.g., register and memory) should be saved to Non-Volatile Memory (NVM) during the execution and be recovered upon power restoration.
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+When designing such technique, software designers rely on an \emph{execution model}, which abstracts the operations in the hardware and describes how intermittent system works.
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+Fig.~\ref{fig:introduction} illustrates this model.
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The voltage of energy storage increases while the system collects energy from environmental sources.
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-When the capacitor voltage reaches a certain threshold voltage, the computing system is powered on and executes.
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+When the capacitor voltage reaches a certain threshold voltage, the computing system is powered on and starts execution.
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When the capacitor voltage hits a power-off threshold later, the computing system is powered off and energy starts to be collected again.
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The goal of software designers is to implement techniques to sustain system states across power failures with minimal overhead under such execution model.
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-The model is not precise enough for recent techniques that aim power failures with frequency of several tens of milliseconds or even in nanosecond scale.
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-The major source of error is the decoupling capacitors in the system.
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-To achieve millisecond-level execution time, the system should adopt a tiny capacitor, whose size is comparable to the decoupling capacitors.
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+However, this model is not precise enough for recent techniques that aim frequent power failures where power failure frequency is of tens of milliseconds or even in nanosecond scale.
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+The major source of inconsistency is the decoupling capacitors in the system.
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+Decoupling capacitors are on-board capacitors attached to the power input/output terminal.
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+These are mandatory components (Sec.~\ref{sec:system_description}) since they prevent voltage ripples when the system draws huge current suddenly (e.g., for checkpoint execution) by buffering energy.
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+They usually have a capacitance ranging from tens (e.g., MSP430) to hundreds (e.g., STM32L5) of uF.
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+
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+They are negligible in battery-powered systems and have small impacts in intermittent systems designed for working more than a second.
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+However, to achieve millisecond-level execution time, the system should adopt a tiny capacitor, whose size is comparable to the decoupling capacitors.
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+When using the capacitors whose size is comparable to the decoupling capacitors as an energy storage, the real system behaves quite differently than the model presented in Fig.~\ref{fig:introduction}.
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+
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+In this paper, we propose detailed execution model.
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+Understanding this model is critical, especially working with small capacitors, since it significantly affects the power efficiency and even correctness of the intermittent system.
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