\section{Conclusion}

When designing software supports for intermittent systems, designers rely on an execution model that abstracts the hardware-level operations and describes the key behaviors of the system.
However, the traditional model is failing to accurately model the actual behaviors as recent systems target smaller energy storages and more power-demanding architectures. 
In this paper, we propose a new execution model, which incorporates the major source of this inconsistency: the buffering effects due to the system's inherent capacitance.
Our model reveals that the traditional model can mislead the power efficiency of the system up to 5.62x and also may lead to unsafe checkpoint executions.
Also, we propose several design guidelines, including methods to predict imminent power failure more accurately, which can improve the performance of existing checkpoint techniques up to 3.04x.