2024d_execution_model/sections/OurApproach.tex

\section{Design Guidelines}
\label{sec:design_guidelines}

\subsection{Delay Checkpoint Execution}

\begin{figure}
    \centering
    \includegraphics[width=\linewidth]{figs/plot_expr_7_cropped.pdf}
    \caption{Execution times across various checkpoint voltages, normalized to the 3.4V case.}
    % \label{fig:hardware_setup}
\end{figure}

\subsection{Use Vdd for Checkpoint Trigger}
\label{sec:use_vdd}

\begin{figure}
    \centering
    \begin{subfigure}{\linewidth}
        \includegraphics[width=\textwidth]{figs/plot_expr_10_cropped.pdf}
        \caption{Dynamic checkpointing (JIT).}
        % \label{fig:eval_voltage_trace}
        \vspace{7pt}
    \end{subfigure}
    \begin{subfigure}{\linewidth}
        \includegraphics[width=\textwidth]{figs/plot_expr_11_cropped.pdf}
        \caption{Static checkpointing.}
        % \label{fig:eval_adaptivenss_finished_tasks}
    \end{subfigure}
    \caption{Impact of precise checkpoint timings to the end-to-end execution times.}
    % \label{fig:sub_voltage_execution}
\end{figure}

\subsection{Design Checkpoint Techniques for Sufficient Power Duration}