2024d_execution_model/sections/Introduction.tex

\section{Introduction}
Batteryless systems are increasingly recognized as a promising future platform of Internet-of-Things (IoT) devices.
They adopt a small capacitor as an energy storage and operate on power collected from environmental sources.
This setup efficiently avoids the challenges associated with battery such as human management for recharging/replacing and harmful environmental impacts.
These systems are also known as intermittent systems, since the computation happens intermittently when there exist sufficient power to compute.

\begin{figure}
    \centering
    \includegraphics[width=\linewidth]{figs/cropped/intermittent_computing.pdf}
    \caption{Traditional execution model of intermittent systems.}
    \label{fig:introduction}
\end{figure}

Intermittent systems require software support to maintain volatile system states across power failures.
The volatile system states (e.g., register and memory) should be saved to Non-Volatile Memory (NVM) during the execution and be recovered upon power restoration.
When designing such technique, software designers rely on an \emph{execution model}, which abstracts the operations in the hardware and describes how intermittent system works.

Fig.~\ref{fig:introduction} illustrates this model.
The voltage of energy storage increases while the system collects energy from environmental sources.
When the capacitor voltage reaches a certain threshold voltage, the computing system is powered on and starts execution.
When the capacitor voltage hits a power-off threshold later, the computing system is powered off and energy starts to be collected again.
The goal of software designers is to implement techniques to sustain system states across power failures with minimal overhead under such execution model.

Recent techniques have aimed frequent power failures.
This is typically considered good, better reactiveness.

However, this model is not precise enough for recent techniques that aim frequent power failures where power failure frequency is of tens of milliseconds or even in nanosecond scale.
The major source of inconsistency is the decoupling capacitors in the system.
Decoupling capacitors are on-board capacitors attached to the power input/output terminal.
These are mandatory components (Sec.~\ref{sec:system_description}) since they prevent voltage ripples when the system draws huge current suddenly (e.g., for checkpoint execution) by buffering energy.
They usually have a capacitance ranging from tens (e.g., MSP430) to hundreds (e.g., STM32L5) of uF.

They are negligible in battery-powered systems and have small impacts in intermittent systems designed for working more than a second.
However, to achieve millisecond-level execution time, the system should adopt a tiny capacitor, whose size is comparable to the decoupling capacitors.
When using the capacitors whose size is comparable to the decoupling capacitors as an energy storage, the real system behaves quite differently than the model presented in Fig.~\ref{fig:introduction}.

In this paper, we propose detailed execution model.
Understanding this model is critical, especially working with small capacitors, since it significantly affects the power efficiency and even correctness of the intermittent system.