ソースを参照

Implement checkpoint code (asm)

Youngbin Kim 2 年 前
コミット
8c2d5f7800

+ 2 - 1
.gitignore

@@ -3,4 +3,5 @@
 .settings
 .mxproject
 .vscode
-/Debug/
+/Debug/
+imc_freertos_app_m33.launch

+ 3 - 1
Core/Inc/ImC/imc_kernel.h

@@ -8,9 +8,11 @@
 
 #define IMC_GLOBAL __attribute__((section(".imc_global")))
 
+#define portSVC_IMC_REQUEST_CHECKPOINT 6
+
 #define imcREQUEST_CHECKPOINT() \
     {                           \
-        __asm("  svc #1");      \
+        __asm("  svc #6");      \
     }
 
 #include "cmsis_os.h"

+ 18 - 4
Core/Src/main.c

@@ -167,6 +167,7 @@ static void MX_ADC2_Init(void);
 void taskEPSRunner(void *argument);
 void taskSnapRunner(void *argument);
 void taskAIRunner(void *argument);
+void taskImcTest(void *argument);
 
 /* USER CODE BEGIN PFP */
 /* USER CODE END PFP */
@@ -293,17 +294,18 @@ int main(void)
 
   /* Create the thread(s) */
   /* creation of taskEPS */
-  taskEPSHandle = osThreadNew(taskEPSRunner, NULL, &taskEPS_attributes);
+  // taskEPSHandle = osThreadNew(taskEPSRunner, NULL, &taskEPS_attributes);
 
   /* creation of taskSnap */
   #if (imcUSE_IMC_KERNEL == 1)
-  taskSnapHandle = imcOsThreadNew(taskSnapRunner, NULL, &taskSnap_attributes);
+  // taskSnapHandle = imcOsThreadNew(taskSnapRunner, NULL, &taskSnap_attributes);
+  taskSnapHandle = imcOsThreadNew(taskImcTest, NULL, &taskSnap_attributes);
   #else
-  taskSnapHandle = osThreadNew(taskSnapRunner, NULL, &taskSnap_attributes);
+  // taskSnapHandle = osThreadNew(taskSnapRunner, NULL, &taskSnap_attributes);
   #endif
 
   /* creation of taskAI */
-  taskAIHandle = osThreadNew(taskAIRunner, NULL, &taskAI_attributes);
+//  taskAIHandle = osThreadNew(taskAIRunner, NULL, &taskAI_attributes);
 
   /* USER CODE BEGIN RTOS_THREADS */
   /* add threads, ... */
@@ -1548,6 +1550,18 @@ void taskAIRunner(void *argument)
   /* USER CODE END taskAIRunner */
 }
 
+void taskImcTest(void *argument) {
+  int i = 0;
+  while(1) {
+    for(int j=0; j<100000000; j++) {
+      __asm(" nop");
+    }
+    osDelay(1000000);
+    printf("i=%d\r\n", i++);
+    imcREQUEST_CHECKPOINT();
+  }
+}
+
 /**
   * @brief  Period elapsed callback in non blocking mode
   * @note   This function is called  when TIM2 interrupt took place, inside

+ 38 - 0
Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/port.c

@@ -864,6 +864,44 @@ uint8_t ucSVCNumber;
 			break;
 		#endif /* configENABLE_MPU */
 
+		#if( imcUSE_IMC_KERNEL == 1)
+			case portSVC_IMC_REQUEST_CHECKPOINT:
+			{
+				__asm volatile(
+					"	ldr	r3, pxCurrentTCBConst3			\n" /* Get the location of the current TCB. */
+					"	ldr	r2, [r3]						\n"
+					"										\n"
+					#if (configENABLE_FPU == 1)
+						"	tst r14, #0x10									\n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
+						"	it eq											\n"
+						"	vstmdbeq r0!, {s16-s31}				\n"
+					#endif /* configENABLE_FPU */
+					"										\n");
+				/* imc */
+				__asm volatile(
+					"	stmdb r0!, {r4-r11, r14}			\n" /* Save the core registers. */
+				);
+				__asm volatile(
+					"	str r0, [r2]						\n" /* Save the new top of stack into the first member of the TCB. */
+					"										\n"
+					"	stmdb sp!, {lr}				\n"
+					"	mov r0, lr				\n"
+					"	mov r1, %0 							\n"
+					"	msr basepri, r1						\n"
+					"	dsb									\n"
+					"	isb									\n"
+
+					"	bl xTaskCheckpointCurrentTask		\n"
+
+					"	mov r0, #0							\n"
+					"	msr basepri, r0						\n"
+					"	ldmia sp!, {lr}				\n"
+					"	bx lr 					\n"
+					"pxCurrentTCBConst3: .word pxCurrentTCB				\n"
+			}
+			break;
+		#endif /* imcUSE_IMC_KERNEL */
+
 		default:
 		{
 			/* Incorrect SVC call. */

+ 15 - 6
Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c

@@ -84,11 +84,20 @@ void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_
 	"	isb												\n"
 	"	bx   r3											\n" /* Finally, branch to EXC_RETURN. */
 	#else /* configENABLE_MPU */
-	"	ldm  r0!, {r1-r2}								\n" /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
-	"	msr  psplim, r1									\n" /* Set this task's PSPLIM value. */
-	"	movs r1, #2										\n" /* r1 = 2. */
-	"	msr  CONTROL, r1								\n" /* Switch to use PSP in the thread mode. */
-	"	adds r0, #32									\n" /* Discard everything up to r0. */
+		"	ldm  r0!, {r1-r2}								\n" /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
+		"	msr  psplim, r1									\n" /* Set this task's PSPLIM value. */
+		"	movs r1, #2										\n" /* r1 = 2. */
+		"	msr  CONTROL, r1								\n" /* Switch to use PSP in the thread mode. */
+	#if( imcUSE_IMC_KERNEL == 1 )
+		"	ldm r0!, {r4-r11}								\n" /* recover*/
+		#if (configENABLE_FPU == 1)
+				"	tst r2, #0x10									\n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
+				"	it eq											\n"
+				"	vldmiaeq r0!, {s16-s31}							\n" /* Restore the FPU registers which are not restored automatically. */
+		#endif /* configENABLE_FPU */
+	#else
+		"	adds r0, #32									\n" /* Discard everything up to r0. */
+	#endif
 	"	msr  psp, r0									\n" /* This is now the new top of stack to use in the task. */
 	"	isb												\n"
 	"	bx   r2											\n" /* Finally, branch to EXC_RETURN. */
@@ -96,7 +105,7 @@ void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_
 	"													\n"
 	"	.align 4										\n"
 	"pxCurrentTCBConst2: .word pxCurrentTCB				\n"
-	#if( configENABLE_MPU == 1 )
+	#if (configENABLE_MPU == 1)
 	"xMPUCTRLConst2: .word 0xe000ed94					\n"
 	"xMAIR0Const2: .word 0xe000edc0						\n"
 	"xRNRConst2: .word 0xe000ed98						\n"

+ 0 - 107
imc_freertos_app_m33.launch

@@ -1,107 +0,0 @@
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